1. Field of the Invention
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2. Description of the Related Art
Different complimentary metal oxide semiconductor (CMOS) devices, such as n-channel metal oxide semiconductor field effect transistors (n-FETs) or p-channel metal oxide semiconductor field effect transistors (p-FETs), often have optimal mobility with semiconductor materials having different crystalline orientations. For example, p-FETs have optimal mobility with 110 orientation silicon because of its excellent hole mobility. Meanwhile, n-FETs have optimal mobility with 100 orientation because of its excellent electron mobility. As complimentary metal oxide semiconductor (CMOS) technology advances, using semiconductor wafers having semiconductor materials with different crystalline orientations optimal for different CMOS devices (i.e., dual orientation wafers) is imperative for allowing different CMOS devices to be formed on the same substrate at the same level. U.S. Pat. No. 6,815,278, to Ieong et al., on Nov. 9, 2004 (incorporated herein by reference), discloses such a dual orientation wafer and commonly used technique for forming such wafers which incorporates a selective epitaxial growth method. The present invention provides a method for forming such dual orientation wafers that is less costly and more easily integrated into current semiconductor wafer manufacturing processes.